Memory cells in recent NAND flash memories are increasingly finer, and bit lines to pass a current to the memory cells are arranged at increasingly narrower pitches. As a result, the resistance and capacitance of the bit lines are not ignorable.
In particular, with many NAND flash memories, the bit lines are generally longer than the word lines, and a current needs to be passed through the diffusion layer of the memory cells. As the memory cells become finer, the wire width and the wire interval become smaller, so that the resistance and capacitance of the bit lines become higher, and therefore, the time required for charging and discharging of the bit lines of the NAND flash memories is increasing.
Since the time required for charging and discharging of the bit lines is increasing, the NAND flash memories have a problem that the time required for writing and reading of the memory cells is increasing.